About Satin IP Technologies
Committed to design quality closure with fast return on investment (ROI), Satin IP Technologies delivers software solutions for fact-based design quality monitoring. The company was founded in 2006 by electronic design automation (EDA) professionals with decades of experience in the development and sale of implementation and verification IP. Satin IP Technologies is a privately held company with offices in Montpellier, France.
Satin IP Technologies develops and licenses VIP Lane®, an innovative design quality closure software solution that allows semiconductor companies to deploy best design practices (standard or proprietary) via the intranet, for facilitated IP or SoC quality monitoring, at zero overheads for the design teams.
At Satin IP Technologies, we think that design quality results from a number of engineering practices throughout the block or chip life cycle, and requires careful daily management rather than subjective scoring a posteriori.
We also believe that large semiconductor companies, as well as IP design startups, cannot satisfy their need for a robust design-for-reuse strategy only by making large investments in EDA and product lifecycle management (PLM) tools. In most cases, these companies have defined best design-for-reuse practices internally and want to see those practices adopted by as many other design teams as possible. Such adoption helps the developers of those practices avoid additional costs in design productivity, but does not necessarily help an external adopter of the practices. Similarly, other companies seem to have an ulterior motive in that they have developed scores of IP blocks over the years ("legacy IP") that they want to qualify for reuse without significant overheads in their own engineering costs.
With the above challenges in mind, our company aim is twofold :
- Help designers of semiconductor IP (chip or block level) put high quality products on the market by offering design quality closure software that is ROI-aware and based on your own design flow.
- Help SoC integrators make IP core selection safer and quicker, by offering IP qualification products and services.
With VIP Lane® and associated qualification services, we can make "design for reuse" and "design quality closure" easier and more productive activities for IP and SoC designers.