Committed to design quality closure with fast return on investment (ROI), Satin IP Technologies delivers software solutions for fact-based design quality monitoring. The company was founded in 2006 by electronic design automation (EDA) professionals with decades of experience in the development and sale of implementation and verification IP. Satin IP is a privately-held company with headquarters in Montpellier, France. [...]
VIP Lane® is an innovative software solution for fact-based design quality monitoring. Working within customers' design flows, VIP Lane turns customers' design practices for IP blocks or SoCs into a robust set of quality criteria and automates the implementation and documentation of design quality metrics at no extra cost in engineering time or resources. VIP Lane shortens time-to-market by delivering effective [...]
It is generally accepted that reusing Semi- conductor IP blocks in a core-based design strategy is the most suitable response to the stringent constraints involved in System on Chip design : increasingly reduced time-to-market, high complexity, difficulty in carrying out exhaustive controls of non functioning cases, final cost reduction, etc. so it is hardly surprising that design-for-reuse has become a source of revenue for [...]